diff --git a/src/kernel/arch/i686/isr.c b/src/kernel/arch/i686/isr.c
index 70fdc47..95da6a2 100644
--- a/src/kernel/arch/i686/isr.c
+++ b/src/kernel/arch/i686/isr.c
@@ -9,7 +9,7 @@
 #include "io.h"
 #include <stdio.h>
 #include <stddef.h>
-#include <dri/serial.h>>
+#include <dri/serial.h>
 
 extern uint16_t DEBUG_COM_PORT;
 
diff --git a/src/kernel/arch/x86_64/gdt.asm b/src/kernel/arch/x86_64/gdt.asm
new file mode 100644
index 0000000..380d9b2
--- /dev/null
+++ b/src/kernel/arch/x86_64/gdt.asm
@@ -0,0 +1,40 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2024   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+[bits 32]
+
+; void __attribute__((cdecl)) GDT_Load(GDTDescriptor* descriptor, uint16_t codeSegment, uint16_t dataSegment);
+global GDT_Load
+GDT_Load:
+    ; make new call frame
+    push ebp             ; save old call frame
+    mov ebp, esp         ; initialize new call frame
+
+    ; load GDT
+    mov eax, [ebp + 8]
+    lgdt [eax]
+
+    ; Reload Code Segment
+    mov eax, [ebp + 12]
+    push eax
+    push .reload_cs
+    retf
+
+.reload_cs:
+
+    ; reload data segments
+    mov ax, [ebp + 16]
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax,
+    mov ss, ax
+
+
+
+    ; restore old call frame
+    mov esp, ebp
+    pop ebp
+    ret
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/gdt.c b/src/kernel/arch/x86_64/gdt.c
new file mode 100644
index 0000000..cf72c6e
--- /dev/null
+++ b/src/kernel/arch/x86_64/gdt.c
@@ -0,0 +1,92 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "gdt.h"
+#include <stdint.h>
+
+typedef struct {
+    uint16_t LimitLow;
+    uint16_t BaseLow;
+    uint8_t BaseMiddle;
+    uint8_t Access;
+    uint8_t FlagsLimitHi;
+    uint8_t BaseHigh;
+} __attribute__((packed)) GDTEntry;
+
+typedef struct {
+    uint16_t Limit;
+    GDTEntry* Ptr;
+} __attribute__((packed)) GDTDescriptor;
+
+typedef enum {
+    GDT_ACCESS_CODE_READABLE            = 0x02,
+    GDT_ACCESS_DATA_WRITEABLE           = 0x02,
+
+    GDT_ACCESS_CODE_CONFORMING          = 0x04,
+    GDT_ACCESS_DATA_DIRECTION_NORMAL    = 0x00,
+    GDT_ACCESS_DATA_DIRECTION_DOWN      = 0x04,
+
+    GDT_ACCESS_DATA_SEGMENT             = 0x10,
+    GDT_ACCESS_CODE_SEGMENT             = 0x18,
+
+    GDT_ACCESS_DESCRIPTOR_TSS           = 0x00,
+
+    GDT_ACCESS_RING0                    = 0x00,
+    GDT_ACCESS_RING1                    = 0x20,
+    GDT_ACCESS_RING2                    = 0x40,
+    GDT_ACCESS_RING3                    = 0x60,
+
+    GDT_ACCESS_PRESENT                  = 0x80,
+
+} GDT_ACCESS;
+
+typedef enum {
+    GDT_FLAG_64BIT                      = 0x20,
+    GDT_FLAG_32BIT                      = 0x40,
+    GDT_FLAG_16BIT                      = 0x00,
+
+    GDT_FLAG_GRANULARITY_1B             = 0x00,
+    GDT_FLAG_GRANULARITY_4k             = 0x80,
+} GDT_FLAGS;
+
+// macros!
+
+#define GDT_LIMIT_LOW(limit)            (limit & 0xFFFF)
+#define GDT_BASE_LOW(base)              (base & 0xFFFF)
+#define GDT_BASE_MIDDLE(base)           ((base >> 16) & 0xFF)
+#define GDT_FLAGS_LIMIT_HI(limit, flags)(((limit >> 16) & 0xF) | (flags & 0xF0))
+#define GDT_BASE_HIGH(base)             ((base >> 24) & 0xFF)
+
+#define GDT_ENTRY(base, limit, access, flags){  \
+    GDT_LIMIT_LOW(limit),                       \
+    GDT_BASE_LOW(base),                         \
+    GDT_BASE_MIDDLE(base),                      \
+    access,                                     \
+    GDT_FLAGS_LIMIT_HI(limit, flags),           \
+    GDT_BASE_HIGH(base)                         \
+}
+GDTEntry g_GDT[] = {
+    // NULL
+    GDT_ENTRY(0, 0, 0, 0),
+
+    // 32-bit kernel code
+    GDT_ENTRY(0,
+              0xFFFFF,
+              GDT_ACCESS_PRESENT | GDT_ACCESS_RING0 | GDT_ACCESS_CODE_SEGMENT | GDT_ACCESS_CODE_READABLE,
+              GDT_FLAG_32BIT | GDT_FLAG_GRANULARITY_4k),
+    // 32-bit data segment
+    GDT_ENTRY(0,
+              0xFFFFF,
+              GDT_ACCESS_PRESENT | GDT_ACCESS_RING0 | GDT_ACCESS_DATA_SEGMENT | GDT_ACCESS_DATA_WRITEABLE,
+              GDT_FLAG_32BIT | GDT_FLAG_GRANULARITY_4k),
+};
+
+GDTDescriptor g_GDTDescriptor = { sizeof(g_GDT) - 1, g_GDT};
+
+void __attribute__((cdecl)) GDT_Load(GDTDescriptor* descriptor, uint16_t codeSegment, uint16_t dataSegment);
+
+void GDT_Initialize() {
+    GDT_Load(&g_GDTDescriptor, GDT_CODE_SEGMENT, GDT_DATA_SEGMENT);
+}
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/gdt.h b/src/kernel/arch/x86_64/gdt.h
new file mode 100644
index 0000000..50366cf
--- /dev/null
+++ b/src/kernel/arch/x86_64/gdt.h
@@ -0,0 +1,11 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+
+#define GDT_CODE_SEGMENT 0x8
+#define GDT_DATA_SEGMENT 0x10
+
+void GDT_Initialize();
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/gen_isr.c b/src/kernel/arch/x86_64/gen_isr.c
new file mode 100644
index 0000000..dc1a065
--- /dev/null
+++ b/src/kernel/arch/x86_64/gen_isr.c
@@ -0,0 +1,520 @@
+// THIS FILE IS AUTOGENERATED VIA genISR.sh, because im pacient but not THAT pacient good lord its 500 lines of pure hell also like i have no braincells left...
+#include "idt.h"
+#include "gdt.h"
+
+void __attribute((cdecl)) ISR0();
+void __attribute((cdecl)) ISR1();
+void __attribute((cdecl)) ISR2();
+void __attribute((cdecl)) ISR3();
+void __attribute((cdecl)) ISR4();
+void __attribute((cdecl)) ISR5();
+void __attribute((cdecl)) ISR6();
+void __attribute((cdecl)) ISR7();
+void __attribute((cdecl)) ISR8();
+void __attribute((cdecl)) ISR9();
+void __attribute((cdecl)) ISR10();
+void __attribute((cdecl)) ISR11();
+void __attribute((cdecl)) ISR12();
+void __attribute((cdecl)) ISR13();
+void __attribute((cdecl)) ISR14();
+void __attribute((cdecl)) ISR15();
+void __attribute((cdecl)) ISR16();
+void __attribute((cdecl)) ISR17();
+void __attribute((cdecl)) ISR18();
+void __attribute((cdecl)) ISR19();
+void __attribute((cdecl)) ISR20();
+void __attribute((cdecl)) ISR21();
+void __attribute((cdecl)) ISR22();
+void __attribute((cdecl)) ISR23();
+void __attribute((cdecl)) ISR24();
+void __attribute((cdecl)) ISR25();
+void __attribute((cdecl)) ISR26();
+void __attribute((cdecl)) ISR27();
+void __attribute((cdecl)) ISR28();
+void __attribute((cdecl)) ISR29();
+void __attribute((cdecl)) ISR30();
+void __attribute((cdecl)) ISR31();
+void __attribute((cdecl)) ISR32();
+void __attribute((cdecl)) ISR33();
+void __attribute((cdecl)) ISR34();
+void __attribute((cdecl)) ISR35();
+void __attribute((cdecl)) ISR36();
+void __attribute((cdecl)) ISR37();
+void __attribute((cdecl)) ISR38();
+void __attribute((cdecl)) ISR39();
+void __attribute((cdecl)) ISR40();
+void __attribute((cdecl)) ISR41();
+void __attribute((cdecl)) ISR42();
+void __attribute((cdecl)) ISR43();
+void __attribute((cdecl)) ISR44();
+void __attribute((cdecl)) ISR45();
+void __attribute((cdecl)) ISR46();
+void __attribute((cdecl)) ISR47();
+void __attribute((cdecl)) ISR48();
+void __attribute((cdecl)) ISR49();
+void __attribute((cdecl)) ISR50();
+void __attribute((cdecl)) ISR51();
+void __attribute((cdecl)) ISR52();
+void __attribute((cdecl)) ISR53();
+void __attribute((cdecl)) ISR54();
+void __attribute((cdecl)) ISR55();
+void __attribute((cdecl)) ISR56();
+void __attribute((cdecl)) ISR57();
+void __attribute((cdecl)) ISR58();
+void __attribute((cdecl)) ISR59();
+void __attribute((cdecl)) ISR60();
+void __attribute((cdecl)) ISR61();
+void __attribute((cdecl)) ISR62();
+void __attribute((cdecl)) ISR63();
+void __attribute((cdecl)) ISR64();
+void __attribute((cdecl)) ISR65();
+void __attribute((cdecl)) ISR66();
+void __attribute((cdecl)) ISR67();
+void __attribute((cdecl)) ISR68();
+void __attribute((cdecl)) ISR69();
+void __attribute((cdecl)) ISR70();
+void __attribute((cdecl)) ISR71();
+void __attribute((cdecl)) ISR72();
+void __attribute((cdecl)) ISR73();
+void __attribute((cdecl)) ISR74();
+void __attribute((cdecl)) ISR75();
+void __attribute((cdecl)) ISR76();
+void __attribute((cdecl)) ISR77();
+void __attribute((cdecl)) ISR78();
+void __attribute((cdecl)) ISR79();
+void __attribute((cdecl)) ISR80();
+void __attribute((cdecl)) ISR81();
+void __attribute((cdecl)) ISR82();
+void __attribute((cdecl)) ISR83();
+void __attribute((cdecl)) ISR84();
+void __attribute((cdecl)) ISR85();
+void __attribute((cdecl)) ISR86();
+void __attribute((cdecl)) ISR87();
+void __attribute((cdecl)) ISR88();
+void __attribute((cdecl)) ISR89();
+void __attribute((cdecl)) ISR90();
+void __attribute((cdecl)) ISR91();
+void __attribute((cdecl)) ISR92();
+void __attribute((cdecl)) ISR93();
+void __attribute((cdecl)) ISR94();
+void __attribute((cdecl)) ISR95();
+void __attribute((cdecl)) ISR96();
+void __attribute((cdecl)) ISR97();
+void __attribute((cdecl)) ISR98();
+void __attribute((cdecl)) ISR99();
+void __attribute((cdecl)) ISR100();
+void __attribute((cdecl)) ISR101();
+void __attribute((cdecl)) ISR102();
+void __attribute((cdecl)) ISR103();
+void __attribute((cdecl)) ISR104();
+void __attribute((cdecl)) ISR105();
+void __attribute((cdecl)) ISR106();
+void __attribute((cdecl)) ISR107();
+void __attribute((cdecl)) ISR108();
+void __attribute((cdecl)) ISR109();
+void __attribute((cdecl)) ISR110();
+void __attribute((cdecl)) ISR111();
+void __attribute((cdecl)) ISR112();
+void __attribute((cdecl)) ISR113();
+void __attribute((cdecl)) ISR114();
+void __attribute((cdecl)) ISR115();
+void __attribute((cdecl)) ISR116();
+void __attribute((cdecl)) ISR117();
+void __attribute((cdecl)) ISR118();
+void __attribute((cdecl)) ISR119();
+void __attribute((cdecl)) ISR120();
+void __attribute((cdecl)) ISR121();
+void __attribute((cdecl)) ISR122();
+void __attribute((cdecl)) ISR123();
+void __attribute((cdecl)) ISR124();
+void __attribute((cdecl)) ISR125();
+void __attribute((cdecl)) ISR126();
+void __attribute((cdecl)) ISR127();
+void __attribute((cdecl)) ISR128();
+void __attribute((cdecl)) ISR129();
+void __attribute((cdecl)) ISR130();
+void __attribute((cdecl)) ISR131();
+void __attribute((cdecl)) ISR132();
+void __attribute((cdecl)) ISR133();
+void __attribute((cdecl)) ISR134();
+void __attribute((cdecl)) ISR135();
+void __attribute((cdecl)) ISR136();
+void __attribute((cdecl)) ISR137();
+void __attribute((cdecl)) ISR138();
+void __attribute((cdecl)) ISR139();
+void __attribute((cdecl)) ISR140();
+void __attribute((cdecl)) ISR141();
+void __attribute((cdecl)) ISR142();
+void __attribute((cdecl)) ISR143();
+void __attribute((cdecl)) ISR144();
+void __attribute((cdecl)) ISR145();
+void __attribute((cdecl)) ISR146();
+void __attribute((cdecl)) ISR147();
+void __attribute((cdecl)) ISR148();
+void __attribute((cdecl)) ISR149();
+void __attribute((cdecl)) ISR150();
+void __attribute((cdecl)) ISR151();
+void __attribute((cdecl)) ISR152();
+void __attribute((cdecl)) ISR153();
+void __attribute((cdecl)) ISR154();
+void __attribute((cdecl)) ISR155();
+void __attribute((cdecl)) ISR156();
+void __attribute((cdecl)) ISR157();
+void __attribute((cdecl)) ISR158();
+void __attribute((cdecl)) ISR159();
+void __attribute((cdecl)) ISR160();
+void __attribute((cdecl)) ISR161();
+void __attribute((cdecl)) ISR162();
+void __attribute((cdecl)) ISR163();
+void __attribute((cdecl)) ISR164();
+void __attribute((cdecl)) ISR165();
+void __attribute((cdecl)) ISR166();
+void __attribute((cdecl)) ISR167();
+void __attribute((cdecl)) ISR168();
+void __attribute((cdecl)) ISR169();
+void __attribute((cdecl)) ISR170();
+void __attribute((cdecl)) ISR171();
+void __attribute((cdecl)) ISR172();
+void __attribute((cdecl)) ISR173();
+void __attribute((cdecl)) ISR174();
+void __attribute((cdecl)) ISR175();
+void __attribute((cdecl)) ISR176();
+void __attribute((cdecl)) ISR177();
+void __attribute((cdecl)) ISR178();
+void __attribute((cdecl)) ISR179();
+void __attribute((cdecl)) ISR180();
+void __attribute((cdecl)) ISR181();
+void __attribute((cdecl)) ISR182();
+void __attribute((cdecl)) ISR183();
+void __attribute((cdecl)) ISR184();
+void __attribute((cdecl)) ISR185();
+void __attribute((cdecl)) ISR186();
+void __attribute((cdecl)) ISR187();
+void __attribute((cdecl)) ISR188();
+void __attribute((cdecl)) ISR189();
+void __attribute((cdecl)) ISR190();
+void __attribute((cdecl)) ISR191();
+void __attribute((cdecl)) ISR192();
+void __attribute((cdecl)) ISR193();
+void __attribute((cdecl)) ISR194();
+void __attribute((cdecl)) ISR195();
+void __attribute((cdecl)) ISR196();
+void __attribute((cdecl)) ISR197();
+void __attribute((cdecl)) ISR198();
+void __attribute((cdecl)) ISR199();
+void __attribute((cdecl)) ISR200();
+void __attribute((cdecl)) ISR201();
+void __attribute((cdecl)) ISR202();
+void __attribute((cdecl)) ISR203();
+void __attribute((cdecl)) ISR204();
+void __attribute((cdecl)) ISR205();
+void __attribute((cdecl)) ISR206();
+void __attribute((cdecl)) ISR207();
+void __attribute((cdecl)) ISR208();
+void __attribute((cdecl)) ISR209();
+void __attribute((cdecl)) ISR210();
+void __attribute((cdecl)) ISR211();
+void __attribute((cdecl)) ISR212();
+void __attribute((cdecl)) ISR213();
+void __attribute((cdecl)) ISR214();
+void __attribute((cdecl)) ISR215();
+void __attribute((cdecl)) ISR216();
+void __attribute((cdecl)) ISR217();
+void __attribute((cdecl)) ISR218();
+void __attribute((cdecl)) ISR219();
+void __attribute((cdecl)) ISR220();
+void __attribute((cdecl)) ISR221();
+void __attribute((cdecl)) ISR222();
+void __attribute((cdecl)) ISR223();
+void __attribute((cdecl)) ISR224();
+void __attribute((cdecl)) ISR225();
+void __attribute((cdecl)) ISR226();
+void __attribute((cdecl)) ISR227();
+void __attribute((cdecl)) ISR228();
+void __attribute((cdecl)) ISR229();
+void __attribute((cdecl)) ISR230();
+void __attribute((cdecl)) ISR231();
+void __attribute((cdecl)) ISR232();
+void __attribute((cdecl)) ISR233();
+void __attribute((cdecl)) ISR234();
+void __attribute((cdecl)) ISR235();
+void __attribute((cdecl)) ISR236();
+void __attribute((cdecl)) ISR237();
+void __attribute((cdecl)) ISR238();
+void __attribute((cdecl)) ISR239();
+void __attribute((cdecl)) ISR240();
+void __attribute((cdecl)) ISR241();
+void __attribute((cdecl)) ISR242();
+void __attribute((cdecl)) ISR243();
+void __attribute((cdecl)) ISR244();
+void __attribute((cdecl)) ISR245();
+void __attribute((cdecl)) ISR246();
+void __attribute((cdecl)) ISR247();
+void __attribute((cdecl)) ISR248();
+void __attribute((cdecl)) ISR249();
+void __attribute((cdecl)) ISR250();
+void __attribute((cdecl)) ISR251();
+void __attribute((cdecl)) ISR252();
+void __attribute((cdecl)) ISR253();
+void __attribute((cdecl)) ISR254();
+void __attribute((cdecl)) ISR255();
+
+void ISR_InitializeGates()
+{
+    IDT_SetGate(0, ISR0, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(1, ISR1, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(2, ISR2, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(3, ISR3, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(4, ISR4, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(5, ISR5, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(6, ISR6, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(7, ISR7, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(8, ISR8, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(9, ISR9, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(10, ISR10, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(11, ISR11, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(12, ISR12, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(13, ISR13, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(14, ISR14, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(15, ISR15, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(16, ISR16, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(17, ISR17, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(18, ISR18, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(19, ISR19, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(20, ISR20, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(21, ISR21, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(22, ISR22, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(23, ISR23, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(24, ISR24, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(25, ISR25, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(26, ISR26, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(27, ISR27, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(28, ISR28, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(29, ISR29, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(30, ISR30, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(31, ISR31, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(32, ISR32, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(33, ISR33, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(34, ISR34, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(35, ISR35, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(36, ISR36, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(37, ISR37, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(38, ISR38, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(39, ISR39, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(40, ISR40, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(41, ISR41, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(42, ISR42, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(43, ISR43, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(44, ISR44, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(45, ISR45, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(46, ISR46, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(47, ISR47, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(48, ISR48, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(49, ISR49, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(50, ISR50, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(51, ISR51, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(52, ISR52, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(53, ISR53, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(54, ISR54, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(55, ISR55, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(56, ISR56, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(57, ISR57, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(58, ISR58, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(59, ISR59, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(60, ISR60, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(61, ISR61, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(62, ISR62, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(63, ISR63, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(64, ISR64, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(65, ISR65, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(66, ISR66, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(67, ISR67, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(68, ISR68, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(69, ISR69, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(70, ISR70, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(71, ISR71, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(72, ISR72, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(73, ISR73, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(74, ISR74, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(75, ISR75, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(76, ISR76, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(77, ISR77, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(78, ISR78, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(79, ISR79, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(80, ISR80, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(81, ISR81, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(82, ISR82, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(83, ISR83, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(84, ISR84, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(85, ISR85, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(86, ISR86, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(87, ISR87, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(88, ISR88, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(89, ISR89, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(90, ISR90, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(91, ISR91, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(92, ISR92, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(93, ISR93, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(94, ISR94, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(95, ISR95, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(96, ISR96, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(97, ISR97, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(98, ISR98, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(99, ISR99, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(100, ISR100, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(101, ISR101, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(102, ISR102, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(103, ISR103, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(104, ISR104, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(105, ISR105, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(106, ISR106, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(107, ISR107, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(108, ISR108, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(109, ISR109, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(110, ISR110, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(111, ISR111, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(112, ISR112, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(113, ISR113, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(114, ISR114, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(115, ISR115, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(116, ISR116, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(117, ISR117, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(118, ISR118, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(119, ISR119, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(120, ISR120, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(121, ISR121, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(122, ISR122, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(123, ISR123, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(124, ISR124, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(125, ISR125, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(126, ISR126, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(127, ISR127, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(128, ISR128, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(129, ISR129, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(130, ISR130, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(131, ISR131, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(132, ISR132, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(133, ISR133, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(134, ISR134, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(135, ISR135, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(136, ISR136, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(137, ISR137, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(138, ISR138, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(139, ISR139, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(140, ISR140, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(141, ISR141, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(142, ISR142, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(143, ISR143, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(144, ISR144, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(145, ISR145, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(146, ISR146, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(147, ISR147, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(148, ISR148, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(149, ISR149, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(150, ISR150, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(151, ISR151, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(152, ISR152, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(153, ISR153, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(154, ISR154, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(155, ISR155, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(156, ISR156, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(157, ISR157, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(158, ISR158, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(159, ISR159, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(160, ISR160, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(161, ISR161, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(162, ISR162, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(163, ISR163, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(164, ISR164, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(165, ISR165, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(166, ISR166, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(167, ISR167, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(168, ISR168, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(169, ISR169, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(170, ISR170, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(171, ISR171, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(172, ISR172, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(173, ISR173, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(174, ISR174, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(175, ISR175, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(176, ISR176, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(177, ISR177, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(178, ISR178, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(179, ISR179, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(180, ISR180, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(181, ISR181, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(182, ISR182, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(183, ISR183, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(184, ISR184, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(185, ISR185, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(186, ISR186, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(187, ISR187, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(188, ISR188, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(189, ISR189, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(190, ISR190, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(191, ISR191, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(192, ISR192, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(193, ISR193, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(194, ISR194, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(195, ISR195, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(196, ISR196, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(197, ISR197, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(198, ISR198, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(199, ISR199, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(200, ISR200, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(201, ISR201, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(202, ISR202, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(203, ISR203, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(204, ISR204, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(205, ISR205, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(206, ISR206, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(207, ISR207, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(208, ISR208, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(209, ISR209, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(210, ISR210, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(211, ISR211, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(212, ISR212, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(213, ISR213, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(214, ISR214, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(215, ISR215, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(216, ISR216, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(217, ISR217, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(218, ISR218, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(219, ISR219, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(220, ISR220, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(221, ISR221, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(222, ISR222, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(223, ISR223, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(224, ISR224, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(225, ISR225, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(226, ISR226, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(227, ISR227, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(228, ISR228, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(229, ISR229, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(230, ISR230, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(231, ISR231, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(232, ISR232, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(233, ISR233, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(234, ISR234, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(235, ISR235, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(236, ISR236, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(237, ISR237, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(238, ISR238, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(239, ISR239, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(240, ISR240, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(241, ISR241, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(242, ISR242, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(243, ISR243, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(244, ISR244, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(245, ISR245, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(246, ISR246, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(247, ISR247, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(248, ISR248, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(249, ISR249, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(250, ISR250, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(251, ISR251, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(252, ISR252, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(253, ISR253, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(254, ISR254, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+    IDT_SetGate(255, ISR255, GDT_CODE_SEGMENT, IDT_FLAG_RING0 | IDT_FLAG_GATE_32BIT_INT);
+}
diff --git a/src/kernel/arch/x86_64/gen_isr.inc b/src/kernel/arch/x86_64/gen_isr.inc
new file mode 100644
index 0000000..e50d732
--- /dev/null
+++ b/src/kernel/arch/x86_64/gen_isr.inc
@@ -0,0 +1,257 @@
+; THIS FILE IS AUTOGENERATED VIA genISR.sh i could've done this once myself but shell script is my fren
+ISR_NOERRORCODE 0
+ISR_NOERRORCODE 1
+ISR_NOERRORCODE 2
+ISR_NOERRORCODE 3
+ISR_NOERRORCODE 4
+ISR_NOERRORCODE 5
+ISR_NOERRORCODE 6
+ISR_NOERRORCODE 7
+ISR_ERRORCODE 8
+ISR_NOERRORCODE 9
+ISR_ERRORCODE 10
+ISR_ERRORCODE 11
+ISR_ERRORCODE 12
+ISR_ERRORCODE 13
+ISR_ERRORCODE 14
+ISR_NOERRORCODE 15
+ISR_NOERRORCODE 16
+ISR_ERRORCODE 17
+ISR_NOERRORCODE 18
+ISR_NOERRORCODE 19
+ISR_NOERRORCODE 20
+ISR_ERRORCODE 21
+ISR_NOERRORCODE 22
+ISR_NOERRORCODE 23
+ISR_NOERRORCODE 24
+ISR_NOERRORCODE 25
+ISR_NOERRORCODE 26
+ISR_NOERRORCODE 27
+ISR_NOERRORCODE 28
+ISR_ERRORCODE 29
+ISR_ERRORCODE 30
+ISR_NOERRORCODE 31
+ISR_NOERRORCODE 32
+ISR_NOERRORCODE 33
+ISR_NOERRORCODE 34
+ISR_NOERRORCODE 35
+ISR_NOERRORCODE 36
+ISR_NOERRORCODE 37
+ISR_NOERRORCODE 38
+ISR_NOERRORCODE 39
+ISR_NOERRORCODE 40
+ISR_NOERRORCODE 41
+ISR_NOERRORCODE 42
+ISR_NOERRORCODE 43
+ISR_NOERRORCODE 44
+ISR_NOERRORCODE 45
+ISR_NOERRORCODE 46
+ISR_NOERRORCODE 47
+ISR_NOERRORCODE 48
+ISR_NOERRORCODE 49
+ISR_NOERRORCODE 50
+ISR_NOERRORCODE 51
+ISR_NOERRORCODE 52
+ISR_NOERRORCODE 53
+ISR_NOERRORCODE 54
+ISR_NOERRORCODE 55
+ISR_NOERRORCODE 56
+ISR_NOERRORCODE 57
+ISR_NOERRORCODE 58
+ISR_NOERRORCODE 59
+ISR_NOERRORCODE 60
+ISR_NOERRORCODE 61
+ISR_NOERRORCODE 62
+ISR_NOERRORCODE 63
+ISR_NOERRORCODE 64
+ISR_NOERRORCODE 65
+ISR_NOERRORCODE 66
+ISR_NOERRORCODE 67
+ISR_NOERRORCODE 68
+ISR_NOERRORCODE 69
+ISR_NOERRORCODE 70
+ISR_NOERRORCODE 71
+ISR_NOERRORCODE 72
+ISR_NOERRORCODE 73
+ISR_NOERRORCODE 74
+ISR_NOERRORCODE 75
+ISR_NOERRORCODE 76
+ISR_NOERRORCODE 77
+ISR_NOERRORCODE 78
+ISR_NOERRORCODE 79
+ISR_NOERRORCODE 80
+ISR_NOERRORCODE 81
+ISR_NOERRORCODE 82
+ISR_NOERRORCODE 83
+ISR_NOERRORCODE 84
+ISR_NOERRORCODE 85
+ISR_NOERRORCODE 86
+ISR_NOERRORCODE 87
+ISR_NOERRORCODE 88
+ISR_NOERRORCODE 89
+ISR_NOERRORCODE 90
+ISR_NOERRORCODE 91
+ISR_NOERRORCODE 92
+ISR_NOERRORCODE 93
+ISR_NOERRORCODE 94
+ISR_NOERRORCODE 95
+ISR_NOERRORCODE 96
+ISR_NOERRORCODE 97
+ISR_NOERRORCODE 98
+ISR_NOERRORCODE 99
+ISR_NOERRORCODE 100
+ISR_NOERRORCODE 101
+ISR_NOERRORCODE 102
+ISR_NOERRORCODE 103
+ISR_NOERRORCODE 104
+ISR_NOERRORCODE 105
+ISR_NOERRORCODE 106
+ISR_NOERRORCODE 107
+ISR_NOERRORCODE 108
+ISR_NOERRORCODE 109
+ISR_NOERRORCODE 110
+ISR_NOERRORCODE 111
+ISR_NOERRORCODE 112
+ISR_NOERRORCODE 113
+ISR_NOERRORCODE 114
+ISR_NOERRORCODE 115
+ISR_NOERRORCODE 116
+ISR_NOERRORCODE 117
+ISR_NOERRORCODE 118
+ISR_NOERRORCODE 119
+ISR_NOERRORCODE 120
+ISR_NOERRORCODE 121
+ISR_NOERRORCODE 122
+ISR_NOERRORCODE 123
+ISR_NOERRORCODE 124
+ISR_NOERRORCODE 125
+ISR_NOERRORCODE 126
+ISR_NOERRORCODE 127
+ISR_NOERRORCODE 128
+ISR_NOERRORCODE 129
+ISR_NOERRORCODE 130
+ISR_NOERRORCODE 131
+ISR_NOERRORCODE 132
+ISR_NOERRORCODE 133
+ISR_NOERRORCODE 134
+ISR_NOERRORCODE 135
+ISR_NOERRORCODE 136
+ISR_NOERRORCODE 137
+ISR_NOERRORCODE 138
+ISR_NOERRORCODE 139
+ISR_NOERRORCODE 140
+ISR_NOERRORCODE 141
+ISR_NOERRORCODE 142
+ISR_NOERRORCODE 143
+ISR_NOERRORCODE 144
+ISR_NOERRORCODE 145
+ISR_NOERRORCODE 146
+ISR_NOERRORCODE 147
+ISR_NOERRORCODE 148
+ISR_NOERRORCODE 149
+ISR_NOERRORCODE 150
+ISR_NOERRORCODE 151
+ISR_NOERRORCODE 152
+ISR_NOERRORCODE 153
+ISR_NOERRORCODE 154
+ISR_NOERRORCODE 155
+ISR_NOERRORCODE 156
+ISR_NOERRORCODE 157
+ISR_NOERRORCODE 158
+ISR_NOERRORCODE 159
+ISR_NOERRORCODE 160
+ISR_NOERRORCODE 161
+ISR_NOERRORCODE 162
+ISR_NOERRORCODE 163
+ISR_NOERRORCODE 164
+ISR_NOERRORCODE 165
+ISR_NOERRORCODE 166
+ISR_NOERRORCODE 167
+ISR_NOERRORCODE 168
+ISR_NOERRORCODE 169
+ISR_NOERRORCODE 170
+ISR_NOERRORCODE 171
+ISR_NOERRORCODE 172
+ISR_NOERRORCODE 173
+ISR_NOERRORCODE 174
+ISR_NOERRORCODE 175
+ISR_NOERRORCODE 176
+ISR_NOERRORCODE 177
+ISR_NOERRORCODE 178
+ISR_NOERRORCODE 179
+ISR_NOERRORCODE 180
+ISR_NOERRORCODE 181
+ISR_NOERRORCODE 182
+ISR_NOERRORCODE 183
+ISR_NOERRORCODE 184
+ISR_NOERRORCODE 185
+ISR_NOERRORCODE 186
+ISR_NOERRORCODE 187
+ISR_NOERRORCODE 188
+ISR_NOERRORCODE 189
+ISR_NOERRORCODE 190
+ISR_NOERRORCODE 191
+ISR_NOERRORCODE 192
+ISR_NOERRORCODE 193
+ISR_NOERRORCODE 194
+ISR_NOERRORCODE 195
+ISR_NOERRORCODE 196
+ISR_NOERRORCODE 197
+ISR_NOERRORCODE 198
+ISR_NOERRORCODE 199
+ISR_NOERRORCODE 200
+ISR_NOERRORCODE 201
+ISR_NOERRORCODE 202
+ISR_NOERRORCODE 203
+ISR_NOERRORCODE 204
+ISR_NOERRORCODE 205
+ISR_NOERRORCODE 206
+ISR_NOERRORCODE 207
+ISR_NOERRORCODE 208
+ISR_NOERRORCODE 209
+ISR_NOERRORCODE 210
+ISR_NOERRORCODE 211
+ISR_NOERRORCODE 212
+ISR_NOERRORCODE 213
+ISR_NOERRORCODE 214
+ISR_NOERRORCODE 215
+ISR_NOERRORCODE 216
+ISR_NOERRORCODE 217
+ISR_NOERRORCODE 218
+ISR_NOERRORCODE 219
+ISR_NOERRORCODE 220
+ISR_NOERRORCODE 221
+ISR_NOERRORCODE 222
+ISR_NOERRORCODE 223
+ISR_NOERRORCODE 224
+ISR_NOERRORCODE 225
+ISR_NOERRORCODE 226
+ISR_NOERRORCODE 227
+ISR_NOERRORCODE 228
+ISR_NOERRORCODE 229
+ISR_NOERRORCODE 230
+ISR_NOERRORCODE 231
+ISR_NOERRORCODE 232
+ISR_NOERRORCODE 233
+ISR_NOERRORCODE 234
+ISR_NOERRORCODE 235
+ISR_NOERRORCODE 236
+ISR_NOERRORCODE 237
+ISR_NOERRORCODE 238
+ISR_NOERRORCODE 239
+ISR_NOERRORCODE 240
+ISR_NOERRORCODE 241
+ISR_NOERRORCODE 242
+ISR_NOERRORCODE 243
+ISR_NOERRORCODE 244
+ISR_NOERRORCODE 245
+ISR_NOERRORCODE 246
+ISR_NOERRORCODE 247
+ISR_NOERRORCODE 248
+ISR_NOERRORCODE 249
+ISR_NOERRORCODE 250
+ISR_NOERRORCODE 251
+ISR_NOERRORCODE 252
+ISR_NOERRORCODE 253
+ISR_NOERRORCODE 254
+ISR_NOERRORCODE 255
diff --git a/src/kernel/arch/x86_64/idt.asm b/src/kernel/arch/x86_64/idt.asm
new file mode 100644
index 0000000..73ba493
--- /dev/null
+++ b/src/kernel/arch/x86_64/idt.asm
@@ -0,0 +1,23 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2024   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+[bits 32]
+
+; void __attribute__((cdecl)) IDT_Load(IDTDescriptor* idtDescriptor);
+global IDT_Load
+IDT_Load:
+
+    ; make new call frame
+    push ebp             ; save old call frame
+    mov ebp, esp         ; initialize new call frame
+    
+    ; load idt
+    mov eax, [ebp + 8]
+    lidt [eax]
+
+    ; restore old call frame
+    mov esp, ebp
+    pop ebp
+    ret
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/idt.c b/src/kernel/arch/x86_64/idt.c
new file mode 100644
index 0000000..985ad00
--- /dev/null
+++ b/src/kernel/arch/x86_64/idt.c
@@ -0,0 +1,50 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "idt.h"
+#include <stdint.h>
+#include <util/binary.h>
+
+typedef struct {
+    uint16_t BaseLow;
+    uint16_t SegmentSelector;
+    uint8_t Reserved;
+    uint8_t Flags;
+    uint16_t BaseHigh;
+} __attribute__((packed)) IDTEntry;
+
+typedef struct {
+    uint16_t Limit;
+    IDTEntry* Ptr;
+
+} __attribute__((packed)) IDTDescriptor;
+
+
+IDTEntry g_IDT[256];
+
+IDTDescriptor g_IDTDescriptor = {sizeof(g_IDT) -1, g_IDT};
+
+void __attribute__((cdecl)) IDT_Load(IDTDescriptor* idtDescriptor);
+
+void IDT_SetGate(int interupt, void* base, uint16_t segmentDescriptor, uint8_t flags) {
+    g_IDT[interupt].BaseLow = ((uint32_t)base) & 0xFFFF;
+    g_IDT[interupt].SegmentSelector = segmentDescriptor;
+    g_IDT[interupt].Reserved = 0;
+    g_IDT[interupt].Flags = flags;
+    g_IDT[interupt].BaseHigh = ((uint32_t)base >> 16) & 0xFFFF;
+}
+
+void IDT_EnableGate(int interupt) {
+    FLAG_SET(g_IDT[interupt].Flags, IDT_FLAG_PRESENT);
+}
+
+void IDT_DisableGate(int interupt) {
+    FLAG_UNSET(g_IDT[interupt].Flags, IDT_FLAG_PRESENT);
+}
+
+void IDT_Initialize() {
+    IDT_Load(&g_IDTDescriptor);
+}
+
diff --git a/src/kernel/arch/x86_64/idt.h b/src/kernel/arch/x86_64/idt.h
new file mode 100644
index 0000000..66c2b91
--- /dev/null
+++ b/src/kernel/arch/x86_64/idt.h
@@ -0,0 +1,29 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+
+#include <stdint.h>
+
+void IDT_Initialize();
+void IDT_DisableGate(int interupt);
+void IDT_EnableGate(int interupt);
+void IDT_SetGate(int interupt, void* base, uint16_t segmentDescriptor, uint8_t flags);
+
+typedef enum {
+    IDT_FLAG_GATE_TASK                  = 0x5,
+    IDT_FLAG_GATE_16BIT_INT             = 0x6,
+    IDT_FLAG_GATE_16BIT_TRAP            = 0x7,
+    IDT_FLAG_GATE_32BIT_INT             = 0xE,
+    IDT_FLAG_GATE_32BIT_TRAP            = 0xF,
+
+    IDT_FLAG_RING0                      = (0 << 5),
+    IDT_FLAG_RING1                      = (1 << 5),
+    IDT_FLAG_RING2                      = (2 << 5),
+    IDT_FLAG_RING3                      = (3 << 5),
+
+    IDT_FLAG_PRESENT                    = 0x80,
+
+} IDT_FLAGS;
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/io.asm b/src/kernel/arch/x86_64/io.asm
new file mode 100644
index 0000000..002ebbe
--- /dev/null
+++ b/src/kernel/arch/x86_64/io.asm
@@ -0,0 +1,36 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2024   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+
+global outb
+outb:
+    [bits 32]
+    mov dx, [esp + 4]
+    mov al, [esp + 8]
+    out dx, al
+    ret
+
+global inb
+inb:
+    [bits 32]
+    mov dx, [esp + 4]
+    xor eax, eax
+    in al, dx
+    ret
+
+global kernel_panic
+kernel_panic:
+    cli
+    hlt
+
+global EnableInterrupts
+EnableInterrupts:
+    sti
+    ret
+
+global DisableInterrupts
+DisableInterrupts:
+    cli
+    ret
diff --git a/src/kernel/arch/x86_64/io.c b/src/kernel/arch/x86_64/io.c
new file mode 100644
index 0000000..47f89e2
--- /dev/null
+++ b/src/kernel/arch/x86_64/io.c
@@ -0,0 +1,13 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "io.h"
+
+#define UNUSED_PORT 0x80
+
+void iowait()
+{
+    outb(UNUSED_PORT, 0);
+}
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/io.h b/src/kernel/arch/x86_64/io.h
new file mode 100644
index 0000000..0b5a9bb
--- /dev/null
+++ b/src/kernel/arch/x86_64/io.h
@@ -0,0 +1,16 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+
+void __attribute__((cdecl)) outb(uint16_t port, uint8_t value);
+uint8_t __attribute__((cdecl)) inb(uint16_t port);
+uint8_t __attribute__((cdecl)) EnableInterrupts();
+uint8_t __attribute__((cdecl)) DisableInterrupts();
+
+void iowait();
+void __attribute__((cdecl)) kernel_panic();
diff --git a/src/kernel/arch/x86_64/irq.c b/src/kernel/arch/x86_64/irq.c
new file mode 100644
index 0000000..b6489ee
--- /dev/null
+++ b/src/kernel/arch/x86_64/irq.c
@@ -0,0 +1,51 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "irq.h"
+#include "pic.h"
+#include "io.h"
+#include <stddef.h>
+#include <stdio.h>
+#include <dri/serial.h>
+
+#define PIC_REMAP_OFFSET        0x20
+
+extern uint16_t DEBUG_COM_PORT;
+
+IRQHandler g_IRQHandlers[16];
+
+void IRQ_Handler(Registers* regs)
+{
+    int irq = regs->interrupt - PIC_REMAP_OFFSET;
+
+    if (g_IRQHandlers[irq] != NULL)
+    {
+        // handle IRQ
+        g_IRQHandlers[irq](regs);
+    }
+    else
+    {
+        Serial_Printf(DEBUG_COM_PORT, "Unhandled IRQ %d...\n", irq);
+    }
+
+    PIC_SendEndOfInterrupt(irq);
+}
+
+void IRQ_Initialize()
+{
+    PIC_Configure(PIC_REMAP_OFFSET, PIC_REMAP_OFFSET + 8);
+
+    // register ISR handlers for each of the 16 IRQ lines
+    for (int i = 0; i < 16; i++)
+        ISR_RegisterHandler(PIC_REMAP_OFFSET + i, IRQ_Handler);
+
+    // enable interrupts 
+    EnableInterrupts();
+}
+
+void IRQ_RegisterHandler(int irq, IRQHandler handler)
+{
+    g_IRQHandlers[irq] = handler;
+}
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/irq.h b/src/kernel/arch/x86_64/irq.h
new file mode 100644
index 0000000..0adf465
--- /dev/null
+++ b/src/kernel/arch/x86_64/irq.h
@@ -0,0 +1,12 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+#include "isr.h"
+
+typedef void (*IRQHandler)(Registers* regs);
+
+void IRQ_Initialize();
+void IRQ_RegisterHandler(int irq, IRQHandler handler);
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/isr.asm b/src/kernel/arch/x86_64/isr.asm
new file mode 100644
index 0000000..9d6585c
--- /dev/null
+++ b/src/kernel/arch/x86_64/isr.asm
@@ -0,0 +1,58 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2024   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+[bits 32]
+
+extern ISR_Handler
+
+; cpu pushes to the stack: ss, esp, eflags, cs, eip
+
+%macro ISR_NOERRORCODE 1
+
+global ISR%1:
+ISR%1:
+    push 0              ; push dummy error code
+    push %1             ; push interrupt number
+    jmp isr_common
+
+%endmacro
+
+%macro ISR_ERRORCODE 1
+global ISR%1:
+ISR%1:
+                        ; cpu pushes an error code to the stack
+    push %1             ; push interrupt number
+    jmp isr_common
+
+%endmacro
+
+%include "arch/i686/gen_isr.inc"
+
+isr_common:
+    pusha               ; pushes in order: eax, ecx, edx, ebx, esp, ebp, esi, edi
+
+    xor eax, eax        ; push ds
+    mov ax, ds
+    push eax
+
+    mov ax, 0x10        ; use kernel data segment
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax
+    
+    push esp            ; pass pointer to stack to C, so we can access all the pushed information
+    call ISR_Handler
+    add esp, 4
+
+    pop eax             ; restore old segment
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax
+
+    popa                ; pop what we pushed with pusha
+    add esp, 8          ; remove error code and interrupt number
+    iret                ; will pop: cs, eip, eflags, ss, esp
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/isr.c b/src/kernel/arch/x86_64/isr.c
new file mode 100644
index 0000000..95da6a2
--- /dev/null
+++ b/src/kernel/arch/x86_64/isr.c
@@ -0,0 +1,83 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "isr.h"
+#include "idt.h"
+#include "gdt.h"
+#include "io.h"
+#include <stdio.h>
+#include <stddef.h>
+#include <dri/serial.h>
+
+extern uint16_t DEBUG_COM_PORT;
+
+ISRHandler g_ISRHandlers[256];
+
+static const char* const g_Exceptions[] = {
+    "Divide by zero error",
+    "Debug",
+    "Non-maskable Interrupt",
+    "Breakpoint",
+    "Overflow",
+    "Bound Range Exceeded",
+    "Invalid Opcode",
+    "Device Not Available",
+    "Double Fault",
+    "Coprocessor Segment Overrun",
+    "Invalid TSS",
+    "Segment Not Present",
+    "Stack-Segment Fault",
+    "General Protection Fault",
+    "Page Fault",
+    "",
+    "x87 Floating-Point Exception",
+    "Alignment Check",
+    "Machine Check",
+    "SIMD Floating-Point Exception",
+    "Virtualization Exception",
+    "Control Protection Exception ",
+    "",
+    "",
+    "",
+    "",
+    "",
+    "",
+    "Hypervisor Injection Exception",
+    "VMM Communication Exception",
+    "Security Exception",
+    ""
+};
+
+void ISR_InitializeGates();
+
+void ISR_Initialize() {
+    ISR_InitializeGates();
+    for (int i = 0; i < 256; i++)
+        IDT_EnableGate(i);
+
+    // IDT_DisableGate(50);
+}
+
+void __attribute__((cdecl)) ISR_Handler(Registers* regs) {
+    if (g_ISRHandlers[regs->interrupt] != NULL)
+        g_ISRHandlers[regs->interrupt](regs);
+
+    else if (regs->interrupt >= 32)
+        Serial_Printf(DEBUG_COM_PORT, "Unhandled Interrupt %d\n", regs->interrupt);
+    else {
+        Serial_Printf(DEBUG_COM_PORT, "Unhandled Exception %d %s\n", regs->interrupt, g_Exceptions[regs->interrupt]);
+        Serial_Printf(DEBUG_COM_PORT, "  EAX=%x EBX=%x ECX=%x EDX=%x ESI=%x EDI=%x\n",  regs->eax, regs->ebx, regs->ecx, regs->edx, regs->esi, regs->edi);
+        Serial_Printf(DEBUG_COM_PORT, "  ESP=%x EBP=%x EIP=%x EFLAGS=%x CS=%x DS=%x SS=%x\n",  regs->esp, regs->ebp, regs->eip, regs->eflags, regs->cs, regs->ds, regs->ss);
+        Serial_Printf(DEBUG_COM_PORT, "  INTERRUPT=%x ERRORCODE=%x\n", regs->interrupt, regs->error);
+        Serial_Printf(DEBUG_COM_PORT, "KERNEL PANIC!\n");
+        kernel_panic();
+    }
+
+}
+void ISR_RegisterHandler(int interrupt, ISRHandler handler)
+{
+    g_ISRHandlers[interrupt] = handler;
+    IDT_EnableGate(interrupt);
+}
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/isr.h b/src/kernel/arch/x86_64/isr.h
new file mode 100644
index 0000000..7474d67
--- /dev/null
+++ b/src/kernel/arch/x86_64/isr.h
@@ -0,0 +1,22 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+#include <stdint.h>
+
+
+typedef struct 
+{
+    // in the reverse order they are pushed:
+    uint32_t ds;                                            // data segment pushed by us
+    uint32_t edi, esi, ebp, useless, ebx, edx, ecx, eax;    // pusha
+    uint32_t interrupt, error;                              // we push interrupt, error is pushed automatically (or our dummy)
+    uint32_t eip, cs, eflags, esp, ss;                      // pushed automatically by CPU
+} __attribute__((packed)) Registers;
+
+typedef void (*ISRHandler)(Registers* regs);
+
+void ISR_Initialize();
+void ISR_RegisterHandler(int interrupt, ISRHandler handler);
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/multiboot.asm b/src/kernel/arch/x86_64/multiboot.asm
new file mode 100644
index 0000000..2c9b5ef
--- /dev/null
+++ b/src/kernel/arch/x86_64/multiboot.asm
@@ -0,0 +1,18 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2025   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+[bits 64]
+section .multiboot_header
+header_start:
+    dd 0xe85250d6                ; magic number
+    dd 0                         ; protected mode code
+    dd header_end - header_start ; header length
+    dd 0x100000000 - (0xe85250d6 + 0 + (header_end - header_start)) ; checksum
+
+    ; required end tag
+    dw 0    ; type
+    dw 0    ; flags
+    dd 8    ; size
+header_end:
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/pic.c b/src/kernel/arch/x86_64/pic.c
new file mode 100644
index 0000000..26f1156
--- /dev/null
+++ b/src/kernel/arch/x86_64/pic.c
@@ -0,0 +1,131 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "pic.h"
+#include "io.h"
+
+#define PIC1_COMMAND_PORT       0x20
+#define PIC2_COMMAND_PORT       0xA0
+#define PIC1_DATA_PORT          0x21
+#define PIC2_DATA_PORT          0xA1
+
+enum {
+    PIC_ICW1_ICW4           = 0x01,
+    PIC_ICW1_SINGLE         = 0x02,
+    PIC_ICW1_INTERVAL4      = 0x02,
+    PIC_ICW1_LEVEL          = 0x08,
+    PIC_ICW1_INITITALIZE    = 0x10
+} PIC_ICW1;
+
+enum {
+    PIC_ICW4_8086           = 0x1,
+    PIC_ICW4_AUTO_EDI       = 0x2,
+    PIC_ICW4_BUFFER_MASTER  = 0x4,
+    PIC_ICW4_BUFFER_SLAVE   = 0x0,
+    PIC_ICW4_BUFFERRED      = 0x8,
+    PIC_ICW4_SFNM           = 0x10
+} PIC_ICW4;
+
+enum {
+    PIC_CMD_END_OF_INTERRUPT    = 0x20,
+    PIC_CMD_READ_IRR            = 0x0A,
+    PIC_CMD_READ_ISR            = 0x0B
+} PIC_CMD;
+
+void PIC_Configure(uint8_t offsetPic1, uint8_t offsetPic2)
+{
+    // init control word 1
+    outb(PIC1_COMMAND_PORT, PIC_ICW1_ICW4 | PIC_ICW1_INITITALIZE);
+    iowait();
+    outb(PIC2_COMMAND_PORT, PIC_ICW1_ICW4 | PIC_ICW1_INITITALIZE);
+    iowait();
+
+    // init control word 2 
+    outb(PIC1_DATA_PORT, offsetPic1);
+    iowait();
+    outb(PIC2_DATA_PORT, offsetPic2);
+    iowait();
+
+    // init control word 3
+    outb(PIC1_DATA_PORT, PIC_ICW4_BUFFER_MASTER);     // tell PIC 1 it has slave at IRQ 2
+    iowait();
+    outb(PIC2_DATA_PORT, PIC_ICW4_BUFFER_SLAVE);     // tell PIC 2 its cascade ID
+    iowait();
+
+    // init control word 4
+    outb(PIC1_DATA_PORT, PIC_ICW4_8086);
+    iowait();
+    outb(PIC2_DATA_PORT, PIC_ICW4_8086);
+    iowait();
+
+    // clear data registers
+    outb(PIC1_DATA_PORT, 0);
+    iowait();
+    outb(PIC2_DATA_PORT, 0);
+    iowait();
+}
+
+void PIC_Mask(int irq)
+{
+    uint8_t port;
+
+    if (irq < 8)
+    {
+        port = PIC1_DATA_PORT;
+    }
+    else
+    {
+        irq -=8;
+        port = PIC2_DATA_PORT;
+    }
+    uint8_t mask = inb(port);
+    outb(port, mask | (1 << irq));
+}
+
+void PIC_Unmask(int irq)
+{
+    uint8_t port;
+
+    if (irq < 8)
+    {
+        port = PIC1_DATA_PORT;
+    }
+    else
+    {
+        irq -=8;
+        port = PIC2_DATA_PORT;
+    }
+    uint8_t mask = inb(port);
+    outb(port, mask & ~(1 << irq));
+}
+
+void PIC_Disable()
+{
+    outb(PIC1_DATA_PORT, 0xFF);
+    iowait();
+    outb(PIC2_DATA_PORT, 0xFF);
+    iowait();
+}
+
+void PIC_SendEndOfInterrupt(int irq)
+{
+    if (irq >= 8)
+        outb(PIC2_COMMAND_PORT, PIC_CMD_END_OF_INTERRUPT);
+    outb(PIC1_COMMAND_PORT, PIC_CMD_END_OF_INTERRUPT);
+}
+
+uint16_t PIC_ReadIRQRequestRegister()
+{
+    outb(PIC1_COMMAND_PORT, PIC_CMD_READ_IRR);
+    outb(PIC2_COMMAND_PORT, PIC_CMD_READ_IRR);
+    return inb(PIC2_COMMAND_PORT) | (inb(PIC2_COMMAND_PORT) << 8);
+}
+
+uint16_t PIC_ReadInServiceRegister()
+{
+    outb(PIC1_COMMAND_PORT, PIC_CMD_READ_ISR);
+    outb(PIC2_COMMAND_PORT, PIC_CMD_READ_ISR);
+    return inb(PIC2_COMMAND_PORT) | (inb(PIC2_COMMAND_PORT) << 8);
+}
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/pic.h b/src/kernel/arch/x86_64/pic.h
new file mode 100644
index 0000000..7ec604c
--- /dev/null
+++ b/src/kernel/arch/x86_64/pic.h
@@ -0,0 +1,15 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+
+#include <stdint.h>
+void PIC_Configure(uint8_t offsetPic1, uint8_t offsetPic2);
+void PIC_SendEndOfInterrupt(int irq);
+void PIC_Disable();
+void PIC_Mask(int irq);
+void PIC_Unmask(int irq);
+uint16_t PIC_ReadIRQRequestRegister();
+uint16_t PIC_ReadInServiceRegister();
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/util.asm b/src/kernel/arch/x86_64/util.asm
new file mode 100644
index 0000000..07fe9df
--- /dev/null
+++ b/src/kernel/arch/x86_64/util.asm
@@ -0,0 +1,52 @@
+;/////////////////////;
+;Nanite OS            ;
+;COPYRIGHT (C) 2025   ;
+;Tyler McGurrin       ;
+;/////////////////////;
+[bits 32]
+
+global Reboot
+Reboot:
+    xor         al, al
+    in          al, 0x64
+    test        al, 0x02
+    jnz         Reboot
+
+    mov         al, 0xFC
+    out         0x64, al
+
+global Read_CR0
+Read_CR0:
+	mov eax, cr0
+	retn
+
+global Write_CR0
+Write_CR0:
+	push ebp
+	mov ebp, esp
+	mov eax, [ebp+8]
+	push eax
+	mov cr0,  eax
+	pop eax
+	pop ebp
+	retn
+
+global Read_CR3
+Read_CR3:
+	mov eax, cr3
+	retn
+
+global Write_CR3
+Write_CR3:
+	push ebp
+	mov ebp, esp
+	mov eax, [ebp+8]
+	mov cr3, eax
+	pop ebp
+	retn
+
+global Enable_Paging
+Enable_Paging:
+	mov eax, cr4
+	or eax, 0x00000010
+	mov cr4, eax
diff --git a/src/kernel/arch/x86_64/util.c b/src/kernel/arch/x86_64/util.c
new file mode 100644
index 0000000..99fa04e
--- /dev/null
+++ b/src/kernel/arch/x86_64/util.c
@@ -0,0 +1,6 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#include "util.h"
\ No newline at end of file
diff --git a/src/kernel/arch/x86_64/util.h b/src/kernel/arch/x86_64/util.h
new file mode 100644
index 0000000..f6c7c74
--- /dev/null
+++ b/src/kernel/arch/x86_64/util.h
@@ -0,0 +1,15 @@
+/*----------------*\
+|Nanite OS         |
+|Copyright (C) 2024|
+|Tyler McGurrin    |
+\*----------------*/
+#pragma once
+
+#include <stdint.h>
+
+void __attribute__((cdecl)) Reboot();
+unsigned long __attribute__((cdecl)) Read_CR0();
+void __attribute__((cdecl)) Write_CR0(unsigned long value);
+unsigned long* __attribute__((cdecl)) Read_CR3();
+void __attribute__((cdecl)) Write_CR3(unsigned long* value);
+void __attribute__((cdecl)) Enable_Paging();
diff --git a/src/kernel/dri/cmos.c b/src/kernel/dri/cmos.c
index e237ea5..adfa70e 100644
--- a/src/kernel/dri/cmos.c
+++ b/src/kernel/dri/cmos.c
@@ -15,6 +15,12 @@
 #define CMOS_DATAPORT 0x71
 
 void CMOS_RTC_Handler()
+{
+    outb(0x70, 0x0C);	// select register C
+    inb(0x71);		    // just throw away contents
+}
+
+void Write_CMOS(uint8_t Register)
 {
 
 }
@@ -22,7 +28,7 @@ void CMOS_RTC_Handler()
 uint8_t Read_CMOS(uint8_t Register)
 {   
    uint8_t data;
-   outb(0x70, Register);
+   outb(CMOS_ADDPORT, Register);
    data = inb(CMOS_DATAPORT);
    return data;
 }
diff --git a/src/kernel/main.c b/src/kernel/main.c
index f57a423..eb9f3ea 100644
--- a/src/kernel/main.c
+++ b/src/kernel/main.c
@@ -19,6 +19,7 @@
 #include <core/memory/page.h>
 #include <util/param.h>
 #include <util/util.h>
+#include <util/binary.h>
 #include <version.h>
 
 extern uint8_t __bss_start;
@@ -64,6 +65,14 @@ void __attribute__((section(".entry"))) start(uint64_t multiboot_magic, void *mu
     Memory_Page_Init();
     printf("Done!\n");
     printf("Multiboot Magic: %d\n", multiboot_magic);
+    printf("The Current Time and Date Is: %d:%d:%d %d/%d/%d%d\n", 
+        BCD2BIN(Read_CMOS(CMOS_RTC_Hours)), 
+        BCD2BIN(Read_CMOS(CMOS_RTC_Minutes)), 
+        BCD2BIN(Read_CMOS(CMOS_RTC_Seconds)), 
+        BCD2BIN(Read_CMOS(CMOS_RTC_Month)),
+        BCD2BIN(Read_CMOS(CMOS_RTC_Day)),
+        BCD2BIN(Read_CMOS(CMOS_RTC_Century)),
+        BCD2BIN(Read_CMOS(CMOS_RTC_Year)));
 
 end:
     for (;;);
diff --git a/src/kernel/version.h b/src/kernel/version.h
index c3cbab5..b1a9a83 100644
--- a/src/kernel/version.h
+++ b/src/kernel/version.h
@@ -6,4 +6,4 @@
 #pragma once
 
 #define LOGO "    _   _____    _   __________________\n   / | / /   |  / | / /  _/_  __/ ____/\n  /  |/ / /| | /  |/ // /  / / / __/   \n / /|  / ___ |/ /|  // /  / / / /___   \n/_/ |_/_/  |_/_/ |_/___/ /_/ /_____/   \n"
-#define VERSION "RD-00043"
\ No newline at end of file
+#define VERSION "RD-00044"
\ No newline at end of file