uhm pretty much fully implemented IRQ stuff, just need to implement proper handlers but will do later (maybe)
This commit is contained in:
parent
55995a37db
commit
a40ab1c13a
@ -1,11 +1,11 @@
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[bits 32]
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global reboot
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reboot:
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global i686_reboot
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i686_reboot:
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XOR AL, AL
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IN AL, 0x64
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TEST AL, 0x02
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JNZ reboot
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JNZ i686_reboot
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MOV AL, 0xFC
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OUT 0x64, AL
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@ -3,4 +3,4 @@
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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#include "basicdri.h"
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#include "basicfunc.h"
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@ -5,4 +5,4 @@
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\*----------------*/
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#pragma once
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void __attribute__((cdecl)) reboot();
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void __attribute__((cdecl)) i686_reboot();
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@ -4,16 +4,16 @@
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;Tyler McGurrin ;
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;/////////////////////;
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global outb
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outb:
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global i686_outb
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i686_outb:
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[bits 32]
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mov dx, [esp + 4]
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mov al, [esp + 8]
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out dx, al
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ret
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global inb
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inb:
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global i686_inb
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i686_inb:
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[bits 32]
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mov dx, [esp + 4]
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xor eax, eax
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@ -24,3 +24,13 @@ global i686_panic
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i686_panic:
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cli
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hlt
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global i686_EnableInterrupts
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i686_EnableInterrupts:
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sti
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ret
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global i686_DisableInterrupts
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i686_DisableInterrupts:
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cli
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ret
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@ -2,4 +2,12 @@
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|Nanite OS |
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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\*----------------*/
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#include "io.h"
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#define UNUSED_PORT 0x80
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void i686_iowait()
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{
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i686_outb(UNUSED_PORT, 0);
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}
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@ -7,8 +7,10 @@
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#include <stdint.h>
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#include <stdbool.h>
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void __attribute__((cdecl)) outb(uint16_t port, uint8_t value);
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uint8_t __attribute__((cdecl)) inb(uint16_t port);
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void __attribute__((cdecl)) i686_outb(uint16_t port, uint8_t value);
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uint8_t __attribute__((cdecl)) i686_inb(uint16_t port);
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uint8_t __attribute__((cdecl)) i686_EnableInterrupts();
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uint8_t __attribute__((cdecl)) i686_DisableInterrupts();
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void i686_iowait();
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void __attribute__((cdecl)) i686_panic();
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48
src/kernel/arch/i686/irq.c
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48
src/kernel/arch/i686/irq.c
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@ -0,0 +1,48 @@
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/*----------------*\
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|Nanite OS |
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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#include "irq.h"
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#include "pic.h"
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#include "io.h"
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#include <stddef.h>
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#include <stdio.h>
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#define PIC_REMAP_OFFSET 0x20
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IRQHandler g_IRQHandlers[16];
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void i686_IRQ_Handler(Registers* regs)
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{
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int irq = regs->interrupt - PIC_REMAP_OFFSET;
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if (g_IRQHandlers[irq] != NULL)
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{
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// handle IRQ
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g_IRQHandlers[irq](regs);
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}
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else
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{
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printf("Unhandled IRQ %d...\n", irq);
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}
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i686_PIC_SendEndOfInterrupt(irq);
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}
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void i686_IRQ_Initialize()
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{
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i686_PIC_Configure(PIC_REMAP_OFFSET, PIC_REMAP_OFFSET + 8);
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// register ISR handlers for each of the 16 IRQ lines
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for (int i = 0; i < 16; i++)
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i686_ISR_RegisterHandler(PIC_REMAP_OFFSET + i, i686_IRQ_Handler);
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// enable interrupts
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i686_EnableInterrupts();
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}
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void i686_IRQ_RegisterHandler(int irq, IRQHandler handler)
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{
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g_IRQHandlers[irq] = handler;
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}
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12
src/kernel/arch/i686/irq.h
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12
src/kernel/arch/i686/irq.h
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@ -0,0 +1,12 @@
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/*----------------*\
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|Nanite OS |
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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#pragma once
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#include "isr.h"
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typedef void (*IRQHandler)(Registers* regs);
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void i686_IRQ_Initialize();
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void i686_IRQ_RegisterHandler(int irq, IRQHandler handler);
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@ -72,4 +72,9 @@ void __attribute__((cdecl)) i686_ISR_Handler(Registers* regs) {
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i686_panic();
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}
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}
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void i686_ISR_RegisterHandler(int interrupt, ISRHandler handler)
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{
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g_ISRHandlers[interrupt] = handler;
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i686_IDT_EnableGate(interrupt);
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}
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@ -19,4 +19,4 @@ typedef struct
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typedef void (*ISRHandler)(Registers* regs);
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void i686_ISR_Initialize();
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void i686_ISR_RegisterHandler(int interrupt);
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void i686_ISR_RegisterHandler(int interrupt, ISRHandler handler);
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131
src/kernel/arch/i686/pic.c
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131
src/kernel/arch/i686/pic.c
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@ -0,0 +1,131 @@
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/*----------------*\
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|Nanite OS |
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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#include "pic.h"
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#include "io.h"
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#define PIC1_COMMAND_PORT 0x20
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#define PIC2_COMMAND_PORT 0xA0
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#define PIC1_DATA_PORT 0x21
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#define PIC2_DATA_PORT 0xA1
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enum {
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PIC_ICW1_ICW4 = 0x01,
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PIC_ICW1_SINGLE = 0x02,
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PIC_ICW1_INTERVAL4 = 0x02,
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PIC_ICW1_LEVEL = 0x08,
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PIC_ICW1_INITITALIZE = 0x10
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} PIC_ICW1;
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enum {
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PIC_ICW4_8086 = 0x1,
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PIC_ICW4_AUTO_EDI = 0x2,
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PIC_ICW4_BUFFER_MASTER = 0x4,
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PIC_ICW4_BUFFER_SLAVE = 0x0,
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PIC_ICW4_BUFFERRED = 0x8,
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PIC_ICW4_SFNM = 0x10
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} PIC_ICW4;
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enum {
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PIC_CMD_END_OF_INTERRUPT = 0x20,
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PIC_CMD_READ_IRR = 0x0A,
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PIC_CMD_READ_ISR = 0x0B
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} PIC_CMD;
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void i686_PIC_Configure(uint8_t offsetPic1, uint8_t offsetPic2)
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{
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// init control word 1
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i686_outb(PIC1_COMMAND_PORT, PIC_ICW1_ICW4 | PIC_ICW1_INITITALIZE);
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i686_iowait();
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i686_outb(PIC2_COMMAND_PORT, PIC_ICW1_ICW4 | PIC_ICW1_INITITALIZE);
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i686_iowait();
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// init control word 2
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i686_outb(PIC1_DATA_PORT, offsetPic1);
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i686_iowait();
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i686_outb(PIC2_DATA_PORT, offsetPic2);
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i686_iowait();
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// init control word 3
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i686_outb(PIC1_DATA_PORT, PIC_ICW4_BUFFER_MASTER); // tell PIC 1 it has slave at IRQ 2
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i686_iowait();
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i686_outb(PIC2_DATA_PORT, PIC_ICW4_BUFFER_SLAVE); // tell PIC 2 its cascade ID
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i686_iowait();
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// init control word 4
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i686_outb(PIC1_DATA_PORT, PIC_ICW4_8086);
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i686_iowait();
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i686_outb(PIC2_DATA_PORT, PIC_ICW4_8086);
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i686_iowait();
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// clear data registers
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i686_outb(PIC1_DATA_PORT, 0);
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i686_iowait();
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i686_outb(PIC2_DATA_PORT, 0);
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i686_iowait();
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}
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void i686_PIC_Mask(int irq)
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{
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uint8_t port;
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if (irq < 8)
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{
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port = PIC1_DATA_PORT;
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}
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else
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{
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irq -=8;
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port = PIC2_DATA_PORT;
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}
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uint8_t mask = i686_inb(port);
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i686_outb(port, mask | (1 << irq));
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}
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void i686_PIC_Unmask(int irq)
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{
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uint8_t port;
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if (irq < 8)
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{
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port = PIC1_DATA_PORT;
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}
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else
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{
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irq -=8;
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port = PIC2_DATA_PORT;
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}
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uint8_t mask = i686_inb(port);
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i686_outb(port, mask & ~(1 << irq));
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}
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void i686_PIC_Disable()
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{
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i686_outb(PIC1_DATA_PORT, 0xFF);
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i686_iowait();
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i686_outb(PIC2_DATA_PORT, 0xFF);
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i686_iowait();
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}
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void i686_PIC_SendEndOfInterrupt(int irq)
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{
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if (irq >= 8)
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i686_outb(PIC2_COMMAND_PORT, PIC_CMD_END_OF_INTERRUPT);
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i686_outb(PIC1_COMMAND_PORT, PIC_CMD_END_OF_INTERRUPT);
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}
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uint16_t i686_PIC_ReadIRQRequestRegister()
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{
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i686_outb(PIC1_COMMAND_PORT, PIC_CMD_READ_IRR);
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i686_outb(PIC2_COMMAND_PORT, PIC_CMD_READ_IRR);
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return i686_inb(PIC2_COMMAND_PORT) | (i686_inb(PIC2_COMMAND_PORT) << 8);
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}
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uint16_t i686_PIC_ReadInServiceRegister()
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{
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i686_outb(PIC1_COMMAND_PORT, PIC_CMD_READ_ISR);
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i686_outb(PIC2_COMMAND_PORT, PIC_CMD_READ_ISR);
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return i686_inb(PIC2_COMMAND_PORT) | (i686_inb(PIC2_COMMAND_PORT) << 8);
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}
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15
src/kernel/arch/i686/pic.h
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15
src/kernel/arch/i686/pic.h
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@ -0,0 +1,15 @@
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/*----------------*\
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|Nanite OS |
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|Copyright (C) 2024|
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|Tyler McGurrin |
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\*----------------*/
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#pragma once
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#include <stdint.h>
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void i686_PIC_Configure(uint8_t offsetPic1, uint8_t offsetPic2);
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void i686_PIC_SendEndOfInterrupt(int irq);
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void i686_PIC_Disable();
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void i686_PIC_Mask(int irq);
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void i686_PIC_Unmask(int irq);
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uint16_t i686_PIC_ReadIRQRequestRegister();
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uint16_t i686_PIC_ReadInServiceRegister();
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@ -7,6 +7,7 @@
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#include <arch/i686/gdt.h>
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#include <arch/i686/idt.h>
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#include <arch/i686/isr.h>
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#include <arch/i686/irq.h>
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#include <stdio.h>
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void HAL_Initialize() {
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@ -22,5 +23,9 @@ void HAL_Initialize() {
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printf("> Initializing ISR...");
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i686_ISR_Initialize();
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printf("Done!\n");
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// init IRQ
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printf("> Initializing IRQ Handling...");
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i686_IRQ_Initialize();
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printf("Done!\n");
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}
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0
src/kernel/hal/isrs.h
Normal file
0
src/kernel/hal/isrs.h
Normal file
@ -8,13 +8,19 @@
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#include <memory.h>
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#include <hal/hal.h>
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#include <arch/i686/io.h>
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#include <arch/i686/basicdri.h>
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#include <arch/i686/irq.h>
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#include <arch/i686/basicfunc.h>
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#include "../version.h"
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extern uint8_t __bss_start;
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extern uint8_t __end;
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void __attribute__((section(".entry"))) start(uint16_t bootDrive) {
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void timer(Registers* regs)
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{
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printf(".");
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}
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void __attribute__((section(".entry"))) start(uint16_t bootDrive) {
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// print logo
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clrscr();
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@ -26,9 +32,9 @@ extern uint8_t __end;
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printf("Initializing HAL...\n");
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HAL_Initialize();
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movecursorpos(19, 8);
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printf("Done!\n\n\n\n");
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printf("Done!\n\n\n\n\n");
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i686_IRQ_RegisterHandler(0, timer);
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end:
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@ -51,10 +51,10 @@ void setcursor(int x, int y)
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{
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int pos = y * SCREEN_WIDTH + x;
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outb(0x3D4, 0x0F);
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outb(0x3D5, (uint8_t)(pos & 0xFF));
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outb(0x3D4, 0x0E);
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outb(0x3D5, (uint8_t)((pos >> 8) & 0xFF));
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i686_outb(0x3D4, 0x0F);
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i686_outb(0x3D5, (uint8_t)(pos & 0xFF));
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i686_outb(0x3D4, 0x0E);
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i686_outb(0x3D5, (uint8_t)((pos >> 8) & 0xFF));
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}
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void clrscr()
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Loading…
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